High speed FPGAs are key in digital imaging. We specialize in both gigabit interfaces and pixel processing algorithms to move and manipulate high-volume data.
We have experience with several of the leading FPGA families
- AMD Xilinx
- Intel (Altera)
- Lattice Semiconductor
- Microchip (Microsemi)
Our code base is optimized for generic RTL syntax to be very portable across architectures.
Of course some hard macros like SerDes and PLLs require custom configuration for the specific FPGA. Typically, those macros are few, and we have experience using those macros from many FPGA vendors.
Camera Interfaces
- CoaXPress
- GigEVision
- USB3Vision
- SDI
- Camera Link
- LVDS
- RS170 (analog)
- Composite video (analog)
- Component video (analog)
Image Processing Functions
- Color space conversion
- Image resizing
- FIR filters
- Gamma encoding / decoding
- Bad pixel detection
- Bad pixel replacement
- Non-uniformity correction
- Auto integration
- Auto gain
- Auto focus
- 10,12,14 bit Pixel packing / unpacking
- Compositing
Sensor Interfaces
- MIPI
- Parallel
- LVDS
- Analog
- 8B/10B
Control Functions
- Register controls
- I2C control
- SPI control
- Motor control
- Auto-boot control
- Ethernet MDIO control
- Configurable (CM3) wishbone interconnect
- AXI
- Genlock
- PID control
Memory Interfaces
- DDR3
- HyperRAM
- Flash